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ASIC Mixed-Signal Verification Engineer (d/m/f)
Garching
Aktualität: 30.04.2025

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30.04.2025, ams Sensors Germany GmbH
Garching
ASIC Mixed-Signal Verification Engineer (d/m/f)
Aufgaben:
Define verification strategy as per system requirements. Define testbench architecture, verification plan, and interact with design teams for feature extraction Perform analog/real-number behavioral modelling and Validation Perform analog netlist extraction for digital-mixed signal testbench Perform execution of verification plans, which includes AMS system-level verification on re-used UVM-based testbench Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem solving ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities. Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem solving * Define verification strategy as per system requirements. Define testbench architecture, verification plan, and interact with design teams for feature extraction* Perform analog/real-number behavioral modelling and Validation* Perform analog netlist extraction for digital-mixed signal testbench* Perform execution of verification plans, which includes AMS system-level verification on re-used UVM-based testbench* Support technical communication with customers and participate in design reviews; ensure schedule adherence and interactive problem solving ams OSRAM is an Equal Employment Opportunity Employer. Diversity, equity and inclusion is strongly established in our corporate culture and we firmly believe it makes us more successful as a company. All qualified applications will receive consideration for employment regardless of ethnic, national or social origin, gender, gender identity, sexual orientation, color, religion, age, physical and mental abilities.
Qualifikationen:
Master's or Bachelor's degree in Electrical Engineering with emphasis in Design Verification or a similar specialty, as well as proven industry experience Expertise in block- and system-level verification with reusable components, testbench architecture and verification planning Experience with analog behavioral modelling with System Verilog RNM and Verilog-AMS Experience with relevant EDA tools and familiarity with scripting languages (e.g. Python, SKILL) Excellent team player; calm professional demeanor and excellent listening skills, ability to organize and prioritize work Fluency in English

Berufsfeld

Bundesland

Standorte

ASIC Mixed-Signal Verification Engineer (d­­/­­m­­/­­f)

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